A 4.4mW Inductorless 2–20 GHz Single-Ended to Differential Frequency Doubler in 45 nm RFSOI CMOS Technology
- Resource Type
- Conference
- Authors
- Meyer, A.; Leyrer, M. L.; Ziegler, C.; Maier, M.; Lammert, V.; Issakov, V.
- Source
- 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Radio Frequency Integrated Circuits Symposium (RFIC), 2023 IEEE. :209-212 Jun, 2023
- Subject
- Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Bandwidth
CMOS technology
Harmonic analysis
Frequency conversion
Radiofrequency integrated circuits
Frequency measurement
frequency doubler
radar
CMOS
- Language
- ISSN
- 2375-0995
This work presents a miniature inductorless frequency doubler with high fundamental rejection, wide bandwidth, and single-ended to differential conversion. By utilizing an NMOS/PMOS pair with symmetrical loads attached to drain and source terminals, the second harmonic of an input signal is extracted. Fundamental rejection of up to 35 dB and a wide output range of 2 to 20 GHz is shown in measurement. The doubler is implemented in 45nm CMOS RFSOI technology and draws 4.4 mW including biasing and buffer stages. The circuit consumes an active area excluding pads of only 50 x 70 µm 2 .