A low voltage high unity-gain bandwidth CMOS op-amp
- Resource Type
- Conference
- Authors
- Chih-Min Yu; Zhi-Ming Lin; Jun-Da Chen
- Source
- The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. Circuits and systems Circuits and Systems, 2004. Proceedings. The 2004 IEEE Asia-Pacific Conference on. 1:45-48 vol.1 2004
- Subject
- Components, Circuits, Devices and Systems
Communication, Networking and Broadcast Technologies
Engineered Materials, Dielectrics and Plasmas
Low voltage
Bandwidth
Operational amplifiers
Rail to rail inputs
Rail to rail amplifiers
Analog circuits
CMOS technology
Circuit simulation
CMOS analog integrated circuits
Gain
- Language
This work presents a /spl plusmn/1V CMOS operation amplifier with constant-g/sub m/ rail-to-rail input stage and class-AB output stage. The designed op-amp has been implemented in TSMC 2P4M 0.35 /spl mu/m CMOS technology and simulated by Hspice. The unity-gain bandwidth of the op-amp is 13.1 MHz with Miller compensation. The slew-rate and settling time are 24V//spl mu/s and 0.48 /spl mu/s, respectively. The open loop gain is 108 dB with 58 degree phase margin.