TSV Integrated and Pattern Recognition Based Multimode Degenerated Low-Power 3-Dimensional Smart Sensing Chips
- Resource Type
- Conference
- Authors
- Zhang, Simian; Deng, Xiaonan; Wang, Yuqi; Wu, Yifei; Ke, Shengxian; Liu, Jianing; Lin, Yuchun; Wang, Zeli; Li, Zhengcao; Wang, Chen
- Source
- 2024 Conference of Science and Technology for Integrated Circuits (CSTIC) Science and Technology for Integrated Circuits (CSTIC), 2024 Conference of. :1-4 Mar, 2024
- Subject
- Bioengineering
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Photonics and Electrooptics
Micromechanical devices
Three-dimensional displays
Manufacturing processes
Semiconductor device reliability
Packaging
Sensors
Pattern recognition
- Language
This paper demonstrates a low-power designed and highly integrated multimode sensor chip that employs wafer level packaging and TSV based 3D integration to ensure high integrated density, high flexibility and high reliability. Through-silicon vias (TSVs) can be adopted to extract electrodes from the back or cross of the wafer to achieve shared integrated circuits, miniaturization of devices and anti-interference capabilities. The integrated multimode sensing chips based on 3D packaging realize the miniaturization of high-performance chips and further provide opportunities for pattern recognition based multimode single-device sensing chips. This unique technology solutions can achieve high compatibility and high packaged manufacturing according to different needs and can be widely applied to various microsystem chips.