Gain Cell Memory on Logic Platform – Device Guidelines for Oxide Semiconductor Transistor Materials Development
- Resource Type
- Conference
- Authors
- Liu, Shuhan; Jana, Koustav; Toprasertpong, Kasidit; Chen, Jian; Liang, Zheng; Jiang, Qi; Wahid, Sumaiya; Qin, Shengjun; Chen, Wei-Chen; Wong, H.-S. Philip
- Source
- 2023 International Electron Devices Meeting (IEDM) Electron Devices Meeting (IEDM), 2023 International. :1-4 Dec, 2023
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Nuclear Engineering
Photonics and Electrooptics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Temperature sensors
Indium tin oxide
Field effect transistors
Random access memory
Bandwidth
NIST
Guidelines
- Language
- ISSN
- 2156-017X
This work starts with memory macro simulation and establishes guidelines for oxide semiconductor (OS) transistor co-designed for gain cell memory on the logic platform. ALD Indium Tin Oxide FET is chosen to balance retention time with memory bandwidth. The experimentally optimized device has low off-current 2×10 -18 A/μm, high on-current 26.8 μA/μm, and low V TH shift