A multistage continuous-time linear equalizer (CTLE) design with a controllable transfer function is presented. The entire frequency range of interest, from dc to gain roll-off frequency, is divided into six regions, and the transfer function in each region is independently matched to be the inverse of the channel transfer function. The equalizer is used for 6-Gb/s data transfer per channel for high-definition multimedia interface (HDMI) 2.0 receiver and 5.4-Gb/s data transfer per channel for DisplayPort (DP) receiver designs. Fabricated in a 28-nm ultrathin body and buried oxide fully depleted silicon-on-insulator technology, the 0.06-mm 2 CTLE consumes 30 mW to achieve up to 28-dB peaking. The entire receiver channel occupies 0.21 mm 2 , consumes 55 mW, and achieves a power efficiency of 9.2 pJ/bit at 6 Gb/s. This design achieves a jitter tolerance of 0.7 unit interval (UI) up to 10 MHz for HDMI and 0.42 UI up to 100 MHz for DP, which is better than their respective specifications.