Germanium Nanowire Reconfigurable Transistor Model for Predictive Technology Evaluation
- Resource Type
- Periodical
- Authors
- Quijada, J.N.; Baldauf, T.; Rai, S.; Heinzig, A.; Kumar, A.; Weber, W.M.; Mikolajick, T.; Trommer, J.
- Source
- IEEE Transactions on Nanotechnology IEEE Trans. Nanotechnology Nanotechnology, IEEE Transactions on. 21:728-736 2022
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Logic gates
Integrated circuit modeling
Germanium
Transistors
Semiconductor device modeling
Predictive models
Silicon
Functionally enhanced logic gates
germanium
MIGRFET
reconfigurable transistor
RFET
TIGFET
- Language
- ISSN
- 1536-125X
1941-0085
Reconfigurable Field Effect Transistors can be electrostatically programmed to p- or n-type behavior. This device level reconfigurability is a promising way to enhance the functionality of digital circuits. Here, we present a Verilog-A based Germanium nanowire table model for the analysis of dynamically reconfigurable logic gates. The model is based on TCAD simulations of a nanowire transistor design with feature sizes compatible to a 14nm FinFET process. To showcase that our model enables digital circuit design for reconfigurable operation, performance and power consumption estimations for basic static as well as reconfigurable logic cells are given. Performance improvements over Silicon nanowire based designs are predicted, making Germanium RFETs a promising candidate for future co-integration into standard CMOS processes.