An efficient FFT (Fast Fourier Transform) processor is greatly needed for real-time operation in many OFDM applications, such as xDSL, DAB, DVB-T/H, and etc. This study developed four types of efficient memory-based Radix-2 FFT architecture with a memory size of N words for N-point FFT operations. The latency can be improved from (N/2)+(N/2)logN, to (N/2+ 2)+(N/4)logN, further to [N/2+2]+(N/8) logN, at the cost of increased hardware. Results show that the developed parallel memory-based architecture can achieve a latency of 140us with 2.425mm2 in area for N=8192, which is well suitable for being implemented in DVB-T/H.