This paper presents a new 16-bit analog-to-residue converter (ARC) for a three moduli set {2 6 −1, 2 6 , 2 6 +1} RNS with a dynamic range of 18 bits. Based on dual-slope integrating principle, direct conversion from analog to residue representation is achieved with only three modulo counters after the voltage sensing circuits. By eliminating the costly binary-to-residue converter, the proposed ARC saves 81.6% of area in comparison with the conventional two-stage architecture consisting of an integrating ADC and a RNS forward converter.