Fin thickness asymmetry effects in multiple-gate SOI FETs (MuGFETs)
- Resource Type
- Conference
- Authors
- Schulz, T.; Xiong, W.; Cleavelin, C.R.; Schruefer, K.; Gostkowski, M.; Matthews, K.; Gebara, G.; Zaman, R.J.; Patruno, P.; Chaudhry, A.; Woo, A.; Colinge, J.P.
- Source
- 2005 IEEE International SOI Conference Proceedings SOI Conference SOI Conference, 2005. Proceedings. 2005 IEEE International. :154-156 2005
- Subject
- Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
FETs
FinFETs
Lithography
Degradation
Threshold voltage
MOSFETs
Silicon
Ion implantation
MOS devices
Electrodes
- Language
- ISSN
- 1078-621X
Fin thickness non-uniformity is a potential shortcoming of vertical multiple-gate devices such as FinFETs and tri-gate FETs. In this paper a test structure with intentionally misaligned gates is used to investigate the sensitivity of electrical characteristics on fin thickness variations.