Hierarchical Thermal Management Policy for High-Performance 3D Systems With Liquid Cooling
- Resource Type
- Periodical
- Authors
- Zanini, F.; Sabry, M. M.; Atienza, D.; De Micheli, G.
- Source
- IEEE Journal on Emerging and Selected Topics in Circuits and Systems IEEE J. Emerg. Sel. Topics Circuits Syst. Emerging and Selected Topics in Circuits and Systems, IEEE Journal on. 1(2):88-101 Jun, 2011
- Subject
- Components, Circuits, Devices and Systems
Three dimensional displays
Thermal management
Liquid cooling
Microchannel
Mathematical model
Heating
Hardware/software co-design
multilayer
multiprocessor system-on-chip (SoC)
power modeling and estimation
thermal
- Language
- ISSN
- 2156-3357
2156-3365
Three-dimensional (3D) integrated circuits and systems are expected to be present in electronic products in the short term. We consider specifically 3D multi-processor systems-on-chips (MPSoCs), realized by stacking silicon CMOS chips and interconnecting them by means of through-silicon vias (TSVs). Because of the high power density of devices and interconnect in the 3D stack, thermal issues pose critical challenges, such as hot-spot avoidance and thermal gradient reduction. Thermal management is achieved by a combination of active control of on-chip switching rates as well as active interlayer cooling with pressurized fluids.