The effects of TaN thickness and strained substrate on the performance and PBTI characteristics of poly-Si/TaN/HfSiON MOSFETs
- Resource Type
- Conference
- Authors
- Cho, H.-J.; Lee, H.L.; Park, S.G.; Park, H.B.; Jeon, T.S.; Jin, B.J.; Kang, S.B.; Lee, S.G.; Kim, Y.P.; Jung, I.S.; Lee, J.W.; Shin, Y.G.; Chung, U.-I.; Moon, J.T.; Choi, J.H.; Jeong, Y.S.
- Source
- IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004. Electron devices meeting Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International. :503-506 2004
- Subject
- Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Photonics and Electrooptics
MOSFETs
Dielectric substrates
Threshold voltage
Annealing
Electric variables
Plasma temperature
Boron
High K dielectric materials
High-K gate dielectrics
Chemical vapor deposition
- Language
The effects of TaN metal-gate thickness on the electrical characteristics of poly-Si/metal-gate/HfSiON MOSFETs have been investigated. Too thin TaN was reactive with poly-Si gate, which led to the formation of Si-doped metal gate. As a result, the work function of the metal gate was reduced and the capacitance increased while generating traps in HfSiON films. P-MOSFET using poly-Si/TaN gate with channel engineering in strained-Si substrate showed threshold voltage of - 0.45 V at W/L= 10/1 /spl mu/m and improved MOSFET characteristics.