A 0.297-pJ/bit 50.4-Gb/s/wire Inverter-Based Short-Reach Simultaneous Bidirectional Transceiver for Die-to-Die Interface in 5nm CMOS
- Resource Type
- Conference
- Authors
- Nishi, Yoshinori; Poulton, John W.; Chen, Xi; Song, Sanquan; Zimmer, Brian; Turner, Walker J.; Tell, Stephen G.; Nedovic, Nikola; Wilson, John M.; Dally, William J.; Gray, C. Thomas
- Source
- 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits) VLSI Technology and Circuits (VLSI Technology and Circuits), 2022 IEEE Symposium on. :154-155 Jun, 2022
- Subject
- Components, Circuits, Devices and Systems
Integrated circuit interconnections
Bidirectional control
Very large scale integration
CMOS process
Transceivers
Silicon
System-on-chip
simultaneous bidirectional
SBD
ISR
CoWoS
InFO
die-to-die
chip-to-chip and interposer
- Language
- ISSN
- 2158-9682
This paper presents a clock-forwarded, Inverter-based Short-Reach Simultaneous Bi-Directional (ISR-SBD) PHY targeted for die-to-die communication over silicon interposer or similar high-density interconnect. Fabricated in a 5nm standard CMOS process, ISR-SBD PHY demonstrates 50.4Gb/s/wire (25.2Gb/s each direction) and 0.297pJ/bit on a 0.75V supply over a 1.2mm on-chip channel.