Parallel-connected SiC MOSFETs are essential in electric vehicle (EV) applications to accommodate the high-power requirements at a smaller device footprint. Low-inductance power modules are necessary to enable high switching frequency operation of the SiC devices. In parallel operation, non-uniform distribution of inductances is often observed, which causes differences between the switching waveforms of different chips; hence, increased device degradation. This work proposes a symmetric, low-inductance, $55\text{mm}\times 47\text{mm}$ design rated at 1200V/400A with four 1200V/100A SiC MOSFETs in parallel with optimised inductance distribution. The electromagnetic performance of the the design is analysed in ANSYS Q3D and LTSpice. A prototype was fabricated and the total inductance was measured with a Vector Network Analyser(VNA). A comparison between simulation and physical measurement verified the low inductance of the proposed design.