Design of A Reconfigurable Architecture for Discrete and Continuous Wavelet Transformsn
- Resource Type
- Conference
- Authors
- Sun, Kang; Pan, Xuezeng; Liu, Zugen; Wu, Tao
- Source
- 2006 International Conference on Communication Technology Communication Technology, 2006. ICCT '06. International Conference on. :1-4 Nov, 2006
- Subject
- Communication, Networking and Broadcast Technologies
Computing and Processing
Components, Circuits, Devices and Systems
Reconfigurable architectures
Discrete wavelet transforms
Continuous wavelet transforms
Filters
Computer architecture
Field programmable gate arrays
Prototypes
Very large scale integration
Educational institutions
Wavelet transforms
- Language
Discrete and continuous wavelet transforms have been widely used in signal and multimedia processing. It is very attractive to design a reconfigurable computing system for discrete and continuous wavelet transform of wide range of wavelet filters. In this paper, a unified computation framework for discrete and continuous wavelet transform based on lifting scheme and a reconfigurable architecture that includes reconfigurable lifting step arrays and reconfigurable address generator are proposed. In order to validate this architecture, an FPGA prototype is built to test the reconfiguration of 2-D discrete 5/3 and 9/7 transforms (defined in JPEG2000) and 2-D continuous Haar wavelet transform. Experiment results show that this design is applicable and scalable.