The probe card is a key component to realizing the interconnection between the wafer and ATE (Automatic Test Equipment) in process of wafer test. The characteristics of a high-end SOC chip, such as multi-pin, fine pin pitch, and high performance, put forward higher requirements on the stability and performance of the probe card, such as board thickness tolerance, warping tolerance, graph alignment, interlayer alignment, aspect ratio, impedance accuracy, and even appearance quality, which are several times higher than the ordinary probe card requirements. At the same time, the flatness of probe needles is also a key point to ensure the interconnection of the wafer and ATE. This paper describes the advanced manufacturing process and technologies of this type of probe card, focusing on the research and breakthrough in the key technologies such as high-precision layer-to-layer alignment and high aspect ratio manufacturing technologies, and flatness control technologies. To reach high-precision layer-to-layer alignment, firstly, the stability of material size was controlled from the source by establishing the material expansion and contraction database. Secondly, laser imaging technology was used to improve the size accuracy of the pattern. Thirdly, by optimizing the precision of the positioning hole to achieve higher precision of lamination and innovative proposed a "concentric circle" coupon verification method to ensure the quality of the product. based on these technologies, the layer-to-layer alignment accuracy can reach below 0.025mm. In the aspect of high ratio manufacturing technologies. The technology of both side drilling and Z direction interconnection is proposed. At the same time, through many tests, it is confirmed that both side drilling has a good effect in the range of 20:1 to 35:1 aspect ratio. And Z direction interconnection technology is a good solution to the aspect ratio is higher than the 35:1 processing problem. About flatness control technologies. On the one hand, the flatness of assembly was strictly controlled below 20μm. On the other hand, optical grinding technology is used to grind the needle. This grinding technology is used to grind the needle without external force, to avoid the damage to the needle. Through the research and application of the advanced technology mentioned above, all the parameters of the probe card sample in actual production meet the requirements of the high-end SOC wafer test application, which provides a feasible solution and idea for such products.