We present the analysis and modeling of a quadrature coupler (QC) and two power dividers/combiners in 90 nm CMOS for 5G communications. To reduce the chip area of these devices, spiral-coupled-line-based structure (or QC-based structure) is adopted. A QC is designed and implemented. The QC achieves phase difference (PD) of 90.015° at 28 GHz, and excellent S 21 and S 31 of 3.65 dB and −3.738 dB, respectively, at 28 GHz. The corresponding amplitude imbalance (AI) is −0.088 dB. Based on the QC structure, a novel high-performance power divider/combiner structure with in-phase divided signals is proposed. Two power dividers/combiners are designed and implemented. The first one uses the 1-turn configuration while the second one uses the 2-turn configuration to further reduce the device area. The first power divider/combiner achieves excellent S 21 and S 31 of −3.449 dB and −3.467 dB, respectively, at 28 GHz. The corresponding AI is 0.018 dB. In addition, PD is −1.127° at 28 GHz. The second power divider/combiner achieves excellent S 21 and S 31 of −3.605 dB and −3.593 dB, respectively, at 28 GHz. The corresponding AI is −0.012 dB. In addition, PD is −0.977° at 28 GHz. The state-of- the-art results of the proposed power divider/combiner indicate that it is suitable for power division/ combination in 5G communications.