Measurement of high-speed ADCs
- Resource Type
- Conference
- Authors
- Kull, Lukas; Luu, Danny
- Source
- 2017 IEEE Custom Integrated Circuits Conference (CICC) Custom Integrated Circuits Conference (CICC), 2017 IEEE. :1-7 Apr, 2017
- Subject
- Components, Circuits, Devices and Systems
Clocks
Signal generators
System-on-chip
Latches
Semiconductor device measurement
Probes
Power supplies
- Language
- ISSN
- 2152-3630
High-speed high-resolution ADCs are challenging in design and measurement. High accuracy on data and clock input have to be ensured. To minimize nonlinearity, it is important to avoid signal-dependent errors. With these goals in mind, we discuss design trade-offs that have to be considered for high-resolution ADCs. Furthermore, a full measurement setup using needle probing for high-speed ADCs is described. On-chip memory enables accurate analysis of the output samples without the need for a high-speed digital interface or data decimation. An efficient shift-register-based approach for an on-chip memory to handle the large aggregated output data of highly interleaved ADCs is presented. The shift-register-based custom memory is compared with a register-based synthesized memory in terms of area and energy efficiency.