Direct digital synthesizer with ROM-Less architecture at 13-GHz clock frequency in InP DHBT technology
- Resource Type
- Periodical
- Authors
- Turner, S.E.; Kotecki, D.E.
- Source
- IEEE Microwave and Wireless Components Letters IEEE Microw. Wireless Compon. Lett. Microwave and Wireless Components Letters, IEEE. 16(5):296-298 May, 2006
- Subject
- Fields, Waves and Electromagnetics
Communication, Networking and Broadcast Technologies
Signal Processing and Analysis
Clocks
Frequency synthesizers
Indium phosphide
DH-HEMTs
Circuit testing
Double heterojunction bipolar transistors
Logic
Circuit synthesis
Frequency measurement
Dynamic range
Accumulator
digital to analog converter (DAC)
direct digital synthesizer (DDS)
heterojunction bipolar transistor (HBT)
high-speed integrated circuits (ICs)
Indium Phosphide (InP)
- Language
- ISSN
- 1531-1309
1558-1764
A direct digital synthesizer (DDS) implemented in InP double heterojunction bipolar transistor (DHBT) technology is reported. The DDS has a ROM-less architecture and instead uses digital logic for phase conversion. The DDS operates up to a 13 GHz clock rate and is capable of synthesizing output frequencies up to 6.5 GHz. Measured spurious free dynamic range (SFDR)ranged from 34 dBc at low frequency control words (FCWs) to 26.67 dBc at high FCWs. The test circuit is implemented with 1646 transistors and consumes 5.42W of power.