Secure architecture for embedded systems
- Resource Type
- Conference
- Authors
- Vai, Michael; Nahill, Ben; Kramer, Josh; Geis, Michael; Utin, Dan; Whelihan, David; Khazan, Roger
- Source
- 2015 IEEE High Performance Extreme Computing Conference (HPEC) High Performance Extreme Computing Conference (HPEC), 2015 IEEE. :1-5 Sep, 2015
- Subject
- Communication, Networking and Broadcast Technologies
Computing and Processing
Computer architecture
Embedded systems
Hardware
Encryption
embedded systems
security
security coprocessor
confidentiality
integrity
PUF
cryptography
key management
Suite B
AES
- Language
Devices connected to the internet are increasingly the targets of deliberate and sophisticated attacks [1]. Embedded system engineers tend to focus on well-defined functional capabilities rather than “obscure” security and resilience. However, “after-the-fact” system hardening could be prohibitively expensive or even impossible. The co-design of security and resilience with functionality has to overcome a major challenge; rarely can the security and resilience requirements be accurately identified when the design begins. This paper describes an embedded system architecture that decouples secure and functional design aspects.