Tunnel Field Effect Transistors (TFETs) bear a distinct advantage over other transistors: they exhibit extremely low quiescent currents, which can be as low as picoamperes. The three key variables that influence the characteristics of TFETs are the attainment of high Ion current, restriction of subthreshold slope value, and reduction of ambipolar leakage. Compared to MOSFETs, TFETs exhibit superior transconductance per bias current, owing to their SS decrease of less than 60 mV per decade. This article presents a comprehensive analysis of various TFET device architectures and their associated performances. The study delves into numerous TFET device topologies and scrutinizes the efficacy of each design in producing the desired Ion/Ioff ratios.