A Neural Stimulator IC with Dynamic Voltage Scaling Supply and Energy Recycling for Cochlear Implant in Standard 180nm CMOS Process
- Resource Type
- Conference
- Authors
- Nguyen, Kim-Hoang; Ahn, Woojin; Je, Minkyu; Nguyen, Quyet; Nguyen, Quynh-Trang; Vu, Thanh-Tung; Pham-Nguyen, Loan
- Source
- 2023 20th International SoC Design Conference (ISOCC) SoC Design Conference (ISOCC), 2023 20th International. :35-36 Oct, 2023
- Subject
- Components, Circuits, Devices and Systems
Multiplexing
Cochlear implants
High-voltage techniques
CMOS process
Energy efficiency
Dynamic voltage scaling
Recycling
DC-DC converter
high voltage
cochlear stimulation
dynamic voltage scaling supply
- Language
- ISSN
- 2472-9655
This paper presents the design of a high-voltage multiplexer (HVMUX) based stimulator with dynamic voltage scaling supply (DVSS) and energy recycling operations for cochlear implant. The proposed device involves a 3-stage charge pump (CP) converting input voltage VDD to multiple output voltages of up to 4VDD, four stimulating channels with fully-integrated HVMUX plus high-voltage adapter (HVA) circuits and additional adaptive control feedback loops. The 3-stage CP generates 4VDD voltage of 12V under a load current of 1.5mA. In case of slow-charging scenario across electrode-tissue interface, the accumulated charge can be recycled in reverse biphasic phase through dynamic control to improve the overall system energy efficiency. The proposed stimulator is implemented using a 180nm standard CMOS process, occupying a total die area of 3.75 mm 2 where each channel only takes up 0.4 mm 2 .