A collision-free time-to-first spike camera architecture based on a winner-take-all network
- Resource Type
- Conference
- Authors
- Massari, Nicola; Jawed, Syed Arsalan; Gottardi, Massimo
- Source
- 2007 18th European Conference on Circuit Theory and Design Circuit Theory and Design, 2007. ECCTD 2007. 18th European Conference on. :950-953 Aug, 2007
- Subject
- Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Sensor arrays
Energy consumption
Delay
Digital cameras
Iterative algorithms
CMOS technology
Circuit simulation
Neuromorphics
Biosensors
Data communication
- Language
A new type of asynchronous time-based digital camera is here presented. The sensor architecture is characterized by a new analog low-power winner take all (WTA) network shared among all the pixels of the array. This circuit detects the most illuminated pixel and transmits it through the channel by queuing the other competitors. An iterative algorithm allows to read-out the entire array, temporally dispatching the information by means of an asynchronous read-out circuit placed at column and row level. The pixel, designed with a 0.35μm CMOS technology and consisting of 28 transistors, performs a simulated average power consumption less than 10nW @ 1.8V for an impinging light power of 100μW/cm 2 .