Ge FinFET CMOS Inverters with Improved Channel Surface Roughness by Using In-situ ALD Digital O3 Treatment
- Resource Type
- Conference
- Authors
- Yeh, M.-S.; Luo, G.-L.; Hou, F.-J.; Sung, P.-J.; Wang, C.-J.; Su, C.-J.; Wu, C.-T.; Huang, Y.-C.; Hong, T.-C.; Chao, T.-S.; Chen, B.-Y.; Chen, K.-M.; Izawa, M.; Miura, M.; Morimoto, M.; Ishimura, H.; Lee, Y.-J.; Wu, W.-F.; Yeh, W.-K.
- Source
- 2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM) Electron Devices Technology and Manufacturing Conference (EDTM), 2018 IEEE 2nd. :205-207 Mar, 2018
- Subject
- Bioengineering
Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Engineering Profession
Power, Energy and Industry Applications
Signal Processing and Analysis
Inverters
Surface treatment
FinFETs
Logic gates
Rough surfaces
Surface roughness
CMOS technology
- Language
Improved electrical characteristics of CMOS inverters composed of Ge n- and p-finFETs were demonstrated by utilizing newly introduced Ge surface treatments. In-situ ALD digital O 3 treatment was adopted on the surface of Ge fin sidewall in order to reduce the roughness and etching damages through the GeO desorption mechanism. By combining this treatment with optimized microwave annealing (MWA), SS and the I ON /I OFF ratio were remarkably improved in both n-finFET and p-finFET, and Ge CMOS inverters with high voltage gain of 50.3 V/V at low V}_{D}}=0.6\ V} was realized.