Low-loss 6-bit Sub-7 GHz Digital Step Attenuator
- Resource Type
- Conference
- Authors
- Nguyen, Luan; Nguyen, Vinh; Phan, Kim; Vu, Thanh; Lee, Sanghun; Huynh, Cuong
- Source
- 2019 International Symposium on Electrical and Electronics Engineering (ISEE) Electrical and Electronics Engineering (ISEE), 2019 International Symposium on. :13-18 Oct, 2019
- Subject
- Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Fields, Waves and Electromagnetics
Power, Energy and Industry Applications
Robotics and Control Systems
Signal Processing and Analysis
Attenuation
Switches
Insertion loss
Topology
Attenuators
Probes
Gallium arsenide
Attenuator
MMIC
wideband
DSA
Phase array
- Language
A low-loss, wide-band 6-bit monolithic microwave integrated circuit (MMIC) digital step attenuator (DSA) for 5G communications is presented. The reduced T-type and switched-path topologies are used to minimize insertion loss and achieve wide-band operation with small attenuation errors. The designed DSA is fabricated using 250nm Gallium Arsenide (GaAs) pHEMT process with a bare-die size of 2.4 mm x 1.3 mm. On-wafer measurement results in 2.4-7 GHz band show that the DSA exhibits a maximum attenuation range of 31.5 dB with steps of 0.5 dB, corresponding to 64 attenuation states. The insertion loss is better than 3.3 dB with maximum Root-Mean-Squared (RMS) attenuation error of 0.5 dB. Maximum phase variation over all attenuation states is 29.1°. Measured input third-order intercept point (IIP3) is higher than 31.73 dBm.