A 23-30 GHz 4-Path Series-Parallel-Combined Class-AB Power Amplifier with 23 dBm Psat, 38.5% Peak PAE and 1.3° AM-PM Distortion in 40nm Bulk CMOS
- Resource Type
- Conference
- Authors
- Gu, Junjie; Qin, Haoqi; Xu, Hao; Liu, Weitian; Han, Kefeng; Yin, Rui; Deng, Lei; Shen, Xiaoliang; Duan, Zongming; Gao, Hao; Yan, Na
- Source
- 2023 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Radio Frequency Integrated Circuits Symposium (RFIC), 2023 IEEE. :197-200 Jun, 2023
- Subject
- Communication, Networking and Broadcast Technologies
Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
Varactors
Power amplifiers
Linearity
Distortion
CMOS process
Harmonic analysis
Radiofrequency integrated circuits
CMOS power amplifier
Ka-band
harmonic traps
frequency staggered tuning
PMOS varactor
- Language
- ISSN
- 2375-0995
This paper presents a 4-path series-parallel combined highly-efficient class-AB power amplifier (PA) with broad bandwidth and low AM-PM distortion in CMOS process. Frequency staggered tuning scheme enables a wide passband of 23-30GHz. AM-PM distortion is minimized by utilizing PMOS varactors that mitigate the voltage dependence of transistor intrinsic capacitors and harmonic traps that minimize common-mode voltage swings at the second-harmonic frequency. Complete electromagnetic modeling ensures the proposed PA achieve its full potential. Fabricated in a 40nm CMOS process, the PA achieves 38.5% peak power added efficiency (PAE), 23.0dBm saturated output power (P sat ) and 20.4dBm output 1-dB compression point (P 1dB ) with 29.5% PAE. The peak PAE is above 35% and P sat /P ldB remains above 21.5dBm/19.5dBm across 23-30GHz respectively. The minimum normalized AM-PM distortion is less than 1.3°at 26 GHz and remains less than 4.4°across 26-30GHz. Measured EVM/ACLR is below -29dB/-29dBc with 64QAM 5G-NR modulated signal at 28GHz.