Designing Circuits for AiMC Based on Non-Volatile Memories: A Tutorial Brief on Trade-Off and Strategies for ADCs and DACs Co-Design
- Resource Type
- Periodical
- Authors
- Vignali, R.; Zurla, R.; Pasotti, M.; Rolandi, P.L.; Singh, A.; Gallo, M.L.; Sebastian, A.; Jang, T.; Antolini, A.; Scarselli, E.F.; Cabrini, A.
- Source
- IEEE Transactions on Circuits and Systems II: Express Briefs IEEE Trans. Circuits Syst. II Circuits and Systems II: Express Briefs, IEEE Transactions on. 71(3):1650-1655 Mar, 2024
- Subject
- Components, Circuits, Devices and Systems
Nonvolatile memory
Computer architecture
Encoding
Microprocessors
Artificial intelligence
Tutorials
Pulse width modulation
AiMC
non-volatile memories
NVM
artificial intelligence
DAC
ADC
MAC operation
- Language
- ISSN
- 1549-7747
1558-3791
Analog In-Memory Computing (AiMC) based on Non-Volatile Memories (NVM) is a promising candidate to reduce latency and power consumption of neural network (NN) inference in edge-computing applications. This kind of computational accelerators allows both storing weights and performing in-situ analog computation inside the array. This tutorial explores trade-offs and strategies in the design of DACs and ADCs for this kind of systems, highlighting the strong interdependence between the two converters. Starting from an analysis of input and weights encoding techniques this tutorial will then propose a discussion aiming at exploring critical aspects that constrain the design of D-A and A-D converters drawing some co-design considerations.