A 15 MHz bandwidth sigma-delta ADC with 11 bits of resolution in 0.13/spl mu/m CMOS
- Resource Type
- Conference
- Authors
- Di Giandomenico, A.; Paton, S.; Wiesbauer, A.; Hernandez, L.; Potscher, T.; Dorrer, L.
- Source
- ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705) Solid-state circuits Solid-State Circuits Conference, 2003. ESSCIRC '03. Proceedings of the 29th European. :233-236 2003
- Subject
- Components, Circuits, Devices and Systems
Engineered Materials, Dielectrics and Plasmas
Bandwidth
Delta-sigma modulation
CMOS technology
Threshold voltage
Circuits
Base stations
Filters
Clocks
Frequency conversion
Dynamic range
- Language
A wide bandwidth continuous time sigma-delta ADC implemented in a 0.13 /spl mu/m CMOS technology is introduced. Active blocks are composed of regular threshold voltage devices only. The circuit is targeted for wide-bandwidth applications such as video or wireless base stations. The fourth-order architecture uses an opamp-RC based loop filter and a 4 bit internal quantizer. Operated at 300 MHz clock frequency, the converter achieves a dynamic range of 11 bits over a bandwidth of 15 MHz. The power dissipation is 70mW operated from a 1.5V supply.