Measurement and Simulation of Mechanical Strength of Back-End-Of-Line Layer in Advanced CMOS Dies
- Resource Type
- Conference
- Authors
- Vandevelde, Bart; Cox, Kevin; Moloudi, Reza; Labie, Riet; Krantz, Jason; Borden, Matt; Vanstreels, Kris; Gonzalez, Mario
- Source
- 2023 24th European Microelectronics and Packaging Conference & Exhibition (EMPC) Microelectronics and Packaging Conference & Exhibition (EMPC), 2023 24th European. :1-5 Sep, 2023
- Subject
- Aerospace
Bioengineering
Components, Circuits, Devices and Systems
Photonics and Electrooptics
Power, Energy and Industry Applications
Transportation
Semiconductor device modeling
Semiconductor device measurement
Thermomechanical processes
Data models
Flip-chip devices
Integrated circuit modeling
Stress measurement
BEOL
thermo-mechanical stress
flip chip assemblies
- Language
The back-end-of-line (BEOL) layers of ICs are subjected to considerably high mechanical forces during processing and when operating in harsh conditions. Without proper design and flip chip process control, the forces induced from flip chip bumps may exceed the ultimate strength of the BEOL resulting in critical failures. It is therefore of high interest to have a measurement method to quantify the strength of the BEOL structure of a functional IC. Ultimate fracture stress values are extracted from these measurements which can be used in thermo-mechanical simulations of flip chip assemblies for survivability evaluations.