Versatile Video Coding (VVC) is a video compression standard that includes the Multiple Transform Selection (MTS) tool, which allows transforming residue from the spatial to the frequency domain with different transforms in each direction (horizontal and vertical). This flexibility, while advantageous, also results in a high computational cost. This paper presents a hardware architecture for the MTS component of the VVC encoder. The multi-transform design allows for the handling of various block sizes, including non-square blocks, and includes all allowed combinations of transforms within the MTS feature. The achieved outcomes demonstrate the effectiveness of the ASIC design, which processes up to 8K@30fps videos in real time.