Algorithm analysis and architecture design for HDTV applications - a look at the H.264/AVC video compressor system
- Resource Type
- Periodical
- Authors
- Tung-Chien Chen; Hung-Chi Fang; Chung-Jr Lian; Chen-Han Tsai; Yu-Wen Huang; To-Wei Chen; Ching-Yen Chen; Yu-Han Chen; Chuan-Yung Tsai; Liang-Gee Chen
- Source
- IEEE Circuits and Devices Magazine IEEE Circuits Devices Mag. Circuits and Devices Magazine, IEEE. 22(3):22-31 Jun, 2006
- Subject
- Components, Circuits, Devices and Systems
Aerospace
Bioengineering
Computing and Processing
Engineered Materials, Dielectrics and Plasmas
Fields, Waves and Electromagnetics
General Topics for Engineers
Signal Processing and Analysis
Transportation
Communication, Networking and Broadcast Technologies
Photonics and Electrooptics
Power, Energy and Industry Applications
Algorithm design and analysis
HDTV
Automatic voltage control
Hardware
Computational complexity
Video coding
Video compression
Codecs
Pipeline processing
Throughput
- Language
- ISSN
- 8755-3996
1558-1888
In this article, we suggest some techniques to design the H.264/AVC video coding system for HDTV applications. The design exploration is made according to software profiling. The design considerations of system scheduling and pipelining are discussed followed by the architecture optimization of the significant modules. The efficient H.264/AVC video coding system is achieved by combining these techniques.