High bandwidth application on 2.5D IC silicon interposer
- Resource Type
- Conference
- Authors
- Wang, Chen-Chao; Cheng, Hung-Hsiang; Chung, Ming-Feng; Pan, Po-Chih; Ho, Cheng-Yu; Chiu, Chi-Tsung; Hung, Chih-Pin
- Source
- 2014 15th International Conference on Electronic Packaging Technology Electronic Packaging Technology (ICEPT), 2014 15th International Conference on. :568-572 May, 2014
- Subject
- Components, Circuits, Devices and Systems
Silicon
Through-silicon vias
Noise
Couplings
Substrates
Analytical models
Through silicon via (TSV)
2.5D-IC
WideIO
signal ntegrity (SI)
power integrity (PI)
- Language
A potential technology by silicon interposer enables high bandwidth and low power application processing devices of the future, because the demand of smart mobile products are driving for higher logic-to-memory bandwidth (BW) over 30 GB/s with lower power consumption and ultra-memory capacity. This paper presents a 2.5D-IC structure with silicon interposer to demonstrate electrical performances including signal integrity (SI) and power integrity (PI) by using WideIO memory interface. Of course, the accuracy of TSV has demonstrated by measurement as well.