A 15 mW 69 dB 2 Gsamples/s CMOS analog front-end for low-band UWB applications
- Resource Type
- Conference
- Authors
- Hua-Chin Lee; Chien-Chih Lin; Chia-Hsin Wu; Shen-Iuan Liu; Chorng-Kuang Wang; Hen-Wai Tsao
- Source
- 2005 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and systems Circuits and Systems (ISCAS), 2005 IEEE International Symposium on. :368-371 Vol. 1 2005
- Subject
- Components, Circuits, Devices and Systems
Communication, Networking and Broadcast Technologies
Engineered Materials, Dielectrics and Plasmas
Broadband amplifiers
CMOS technology
Ultra wideband technology
Gain
Sampling methods
Circuits
Timing
Ring oscillators
Phase locked loops
Clocks
- Language
- ISSN
- 0271-4302
2158-1525
The paper presents a CMOS analog front-end (AFE) for a short range impulse radio system in low-band ultrawideband (UWB) based on 2 ns width PAM. The wideband amplifier provides 69 dB gain from 30 MHz to 1.2 GHz, realized by a limiting amplifier with an active-inductor load and a cross-coupled g/sub m/ gain-boosting cell in each gain stage. The received signal is digitized at 2 GHz sampling rate by 8 parallel 1-bit ADCs, each of which is composed of transmission-gate type sample-and-hold circuits and a dynamic differential comparator. A timing generator based on a 4-stage ring oscillator in a PLL is employed to provide 8-phase 250 MHz clocks. Realized in 0.18 /spl mu/m CMOS technology, the AFE occupies a 1.0/spl times/1.2 mm/sup 2/ active area with the 3/sup rd/ order loop filter integrated in the same die. This chip also includes an integrated pulse generator for loop-back self-testing purposes. The receiver AFE achieves 200 /spl mu/V sensitivity and consumes 15 mW from a 1.8 V supply.