A Neural Stimulator with 11.4 V Voltage-Compliance Realized in a $0.18-\mu\mathrm{m}$ 3.3 V CMOS Technology
- Resource Type
- Conference
- Authors
- Cao, Liwei; Liu, Xiao
- Source
- 2023 IEEE International Symposium on Circuits and Systems (ISCAS) Circuits and Systems (ISCAS), 2023 IEEE International Symposium on. :1-5 May, 2023
- Subject
- Components, Circuits, Devices and Systems
Power, Energy and Industry Applications
Signal Processing and Analysis
Electrodes
Low voltage
Neuroprostheses
Voltage
High-voltage techniques
Logic gates
Safety
Neural stimulator
Voltage stress
Closed-loop
Voltage compliance
High voltage
- Language
- ISSN
- 2158-1525
A neural stimulator with a 11.4 V voltage compliance under a 12 V supply voltage has been proposed. The stimulator ASIC has been realized using only low-voltage transistors in a $0.18-\mu\mathrm{m}$ 3.3 V triple-well CMOS process with deep N-well. The proposed stimulator continuously senses the voltage at the stimulating electrode and adaptively adjusts the bias voltages to the gate of stacked transistors in the output branch, ensuring the voltage stress on each individual transistor are all within the safety limit. The stimulator supplies biphasic stimulus current with a maximum stimulus current of $100\ \mu\mathrm{A}$ and occupies 0.08 mm 2 area. The proposed low-voltage transistor implementation of a high-voltage stimulator is especially suitable for multi-channel closed-loop neuroprosthetic devices where the stimulator can be integrated with other units which typically operate from low voltage supplies, such as recording amplifiers and signal processing units.