In recent years, high density packaging (HDP) in electronics manufacturing has been increasingly adopted to meet the needs of miniaturization and increasing functionality in electronic products. One of the failure mechanisms that is causing considerable concern is Electro-migration (EM). EM is due to metal transportation at the atomic level caused by high current density which is an inevitable consequence of miniaturization. EM is known to cause voids and hill-locks in metal conductors and in the worst cases, this leads to open or short circuits. Moreover, higher current density and complexity of interconnect structures also generates high temperature and stress gradients which result in void formation due to thermo-migration and stress-migration respectively in conductors. As a result, the true causes of metal migration involve a multi-physical cross coupling relationship and are hard understood and characterize. For example, in flip-chip interconnects the ever decreasing size of solder joints can lead to current densities reaching 10 A/cm, these will promote electro-migration but also result in high temperature and stress gradients which need to be understood, particularly when aiming to develop qualification tests for this phenomena.