Josephson 4 K-bit cache memory design for a prototype signal processor. II. Cell array and drivers.
- Resource Type
- Article
- Authors
- Henkels, W. H.; Geppert, L. M.; Kadlec, J.; Epperlein, P. W.; Beha, H.; Chang, W. H.; Jaeckel, H.
- Source
- Journal of Applied Physics. 9/15/1985, Vol. 58 Issue 6, p2379. 10p. 4 Diagrams, 1 Chart, 3 Graphs.
- Subject
- *JOSEPHSON effect
*CACHE memory
*SIGNAL processing
- Language
- ISSN
- 0021-8979
Presents a study which described Josephson 4 K-bit cache memory design for a prototype signal processor. Method of the study; Resuls and discussion; Conclusion.