A digital-PLL-based true random number generator
- Resource Type
- Conference
- Authors
- Chengxin Liu; McNeill, J.
- Source
- Research in Microelectronics and Electronics, 2005 PhD Microelectronics and Electronics Research in Microelectronics and Electronics, 2005 PhD. 1:113-116 vol.1 2005
- Subject
- Components, Circuits, Devices and Systems
Random number generation
Phase noise
Jitter
Ring oscillators
Frequency
Phase locked loops
White noise
Noise measurement
Delay effects
Phase measurement
- Language
A true random number generator (RNG) based on a digital phase-locked loop (PLL) has been designed and implemented in a 1.5/spl mu/m CMOS process. It achieved an output data rate of 100 kbps from the sampling of two 30MHz ring oscillators, and successfully passed the NIST test suite SP800-22.