Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache
- Resource Type
- Periodical
- Authors
- Hsieh, J.; Hou, Y.; Chang, T.
- Source
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on. 41(8):2753-2757 Aug, 2022
- Subject
- Components, Circuits, Devices and Systems
Computing and Processing
Codes
Encoding
Magnetization
Magnetic tunneling
Switches
Resistance
Random access memory
MLC STT-RAM
last-level cache
- Language
- ISSN
- 0278-0070
1937-4151
Although multiple-level-cell (MLC) STT-RAM increases data density, it suffers from the two-step transition (TT) issue. It is because hard domain and soft domain of an MLC STT-RAM cell cannot be flipped to the opposite magnetization direction at the same time. Thus, the soft domain has to be flipped twice to the opposite magnetization direction of the hard domain. The TT problem hurts the lifetime of MLC STT-RAM due to additional flips on soft domains. To mitigate the TT problem of MLC STT-RAM, we propose an alternative encoding scheme (AES) to reduce the occurrence of TTs. AES utilizes the encoding method to eliminate most TTs and distributes unavoidable TTs among cells evenly to improve the lifetime of MLC STT-RAM cache. The experimental results showed that the proposed scheme achieved a great lifetime improvement than the related work.